1. Field of the Invention
The present application relates generally to memory access. More specifically, the present application relates generally to a computer-implemented method, data processing system, and computer usable program code for reducing memory access latency for hypervisor- or supervisor-initiated memory access requests.
2. Description of the Related Art
Increasingly large symmetric multi-processor data processing systems are not being used as single large data processing systems. Instead, these types of data processing systems are being partitioned and used as smaller systems. These systems are also referred to as logical partitioned (LPAR) data processing systems. A logical partitioned functionality within a data processing system allows multiple copies of a single operating system, or multiple heterogeneous operating systems, to be simultaneously run on a single data processing system platform. A partition, within which an operating system image runs, is assigned a non-overlapping subset of the platform's resources. These platform allocatable resources include one or more architecturally distinct processors, and their interrupt management area, regions of system memory and input/output (I/O) adapter bus slots. The partition's resources are represented by the platform's firmware to the operating system image.
Each distinct operating system, or image of an operating system running within a platform, is protected from each other such that software errors on one logical partition cannot affect the correct operations of any of the other partitions. This protection is provided by allocating a disjointed set of platform resources to be directly managed by each operating system image and by providing mechanisms for ensuring that the various images cannot control any resources that have not been allocated to that image. Furthermore, software errors in the control of an operating system's allocated resources are prevented from affecting the resources of any other image. Thus, each image of the operating system or each different operating system, directly controls a distinct set of allocatable resources within the platform.
With respect to hardware resources in a logical partitioned data processing system, these resources are disjointly shared among various partitions. These resources may include, for example, input/output (I/O) adapters, memory dual in-line memory modules (DIMMs), non-volatile random access memory (NVRAM), and hard disk drives. Each partition within a LPAR data processing system may be booted and shut down over and over without having to power-cycle the entire data processing system.
When a system with multiple processors accesses a shared memory, the memory at times could be kept busy by the concurrent accesses from several processors. Under such busy conditions, a read or write access to a shared memory, initiated by the processor in supervisor or hypervisor state, could get queued up behind other application requests in the front of the queue. The queuing latency suffered by any read or write request would depend on the number of requests that are ahead of read or write request in the memory system queue. Since the hypervisor and supervisor together manage the system resources for maximum efficiency according to user-specified rules, their read requests to memory are generally critical for achieving optimal system performance. Therefore, a useful means is needed by which the memory latency for hypervisor- or supervisor-initiated read or write requests could be reduced.